Semiconductor Engineering

Alchip Minimizes Dynamic Power For High-Performance Computing ASICs

Alchip, a fabless ASIC provider, focuses on high-performance computing ASICs. They decided to undertake a new project where they would employ the PowerPro RTL Low-Power Platform to reduce dynamic ...
EDN

Employ dynamic power reduction in an ASIC

Incorporate power-saving methods at multiple levels in application-specific IP. Increasing battery life without compromising performance and functionality is a prime concern for the handheld market.
EDN

Low power implementation techniques for ASIC physical design

In the semiconductor domain, the operating frequency of devices and the number of transistors in a single module increase over time. In this article, we will look at widely known low power ...
Semiconductor Engineering

Power Methodology For Estimation And Optimization In The ASIC/SoC Flow

In this white paper, we’ll review the many steps of today’s common ASIC/SoC power methodologies and tool flows. We’ll then propose ways you can further optimize your power methodology to more quickly ...