EDN

HDL-design challenges and philosophies for real-world ASIC implementations

New requirements for the MAC (medium-access control) and PHY (physical-layer interface) of a wireless-communications system can pose significant challenges for system designers looking to quickly get ...
Design-Reuse

MAZeT offers Interbus-IP for customized FPGA and ASIC implementation

Jena -- March 19 2009 - MAZeT GmbH offers IP cores for the Interbus protocol (SUPI4 / Phoenix Contact) for implementation in FPGAs and ASICs. The protocol chip for serial communication interfaces in ...
Design-Reuse

PCI Express Design Considerations -- RapidChip Platform ASIC vs. FPGA Design Efficiency

This paper describes the implementation differences of an IP core between FPGA and RapidChip® Platform ASIC technologies. By mapping the same complex, high-speed PCI Express core onto these two ...
Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Semiconductor Engineering

FPGA Design Tradeoffs Getting Tougher

FPGAs are getting larger, more complex, and significantly harder to verify and debug. In the past, FPGAs were considered a relatively quick and simple way to get to market before committing to the ...
Semiconductor Engineering

FPGA And System Designs Get To Market Faster Leveraging ASIC-Proven Analysis Tools

Digital systems need clocks. Today’s designs require more from clocking schemes than ever before, and it’s likely this trend will continue. Increasing power constraints have resulted in finer-grained ...
EDN

FPGA-prototyping and ASIC-conversion considerations

The capacity and capability of modern FPGAs support the implementation of many digital systems, making FPGAs the platforms of choice for developing, prototyping, and deploying digital logic. Depending ...
New Electronics

Avnet ASIC Team launches design services for TSMC's 4nm process node

Avnet ASIC, a division of Avnet Silica, has launched new ultra-low-power design services for TSMC's cutting-edge 4nm and below process technologies. These services are designed to enable customers to ...
Electronic Design

7-nm ASIC Technology Sets Sights on Future Data Centers

7-nm ASIC technology benefits in the semiconductor industry. Role of the 7-nm ASIC advanced node in data centers. Cost trends of advanced nodes in the semiconductor industry. As more consumers embrace ...
Electronic Design

Structured ASICs

So what’s a STRUCTURED ASIC? A Structured ASIC is a type of integrated circuit that contains blocks of logic, called "tiles." These tiles reside in the die ready to be connected in a customizable ...